Artifact covered-doc_0.7.10-5_all

deb_control_files:
- control
- md5sums
deb_fields:
  Architecture: all
  Description: |-
    Verilog code coverage analysis tool - documentation
     Covered is a Verilog code coverage utility that reads in a Verilog design and
     a generated VCD/LXT dumpfile from that design and generates a coverage file
     that can be merged with other coverage files or used to create a coverage
     report. Covered also contains the GUI coverage report utility that reads in a
     coverage file to allow interactive coverage discovery. Areas of coverage
     measured by Covered are: line, toggle, memory, combinational logic, FSM
     state/state-transition and assertion coverage.
     .
     This package contains the documentation.
  Homepage: http://covered.sourceforge.net/
  Installed-Size: '2438'
  Maintainer: Debian Electronics Team <pkg-electronics-devel@lists.alioth.debian.org>
  Package: covered-doc
  Priority: optional
  Section: doc
  Source: covered
  Version: 0.7.10-5
srcpkg_name: covered
srcpkg_version: 0.7.10-5