Artifact verilator_5.006-3_amd64

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deb_control_files:
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deb_fields:
  Architecture: amd64
  Built-Using: sphinx (= 5.3.0-4)
  Depends: python3, perl:any, libc6 (>= 2.35), libjs-sphinxdoc (>= 5.2), sphinx-rtd-theme-common
    (>= 1.2.0+dfsg)
  Description: |-
    fast free Verilog simulator
     Verilator is the fastest free Verilog HDL simulator, and beats many commercial
     simulators. It compiles synthesizable Verilog (not test-bench code!), plus
     some PSL, SystemVerilog and Synthesis assertions into C++ or SystemC code.
     It is designed for large projects where fast simulation performance is of
     primary concern, and is especially well suited to generate executable models
     of CPUs for embedded software design teams.
  Homepage: http://www.veripool.org/wiki/verilator
  Installed-Size: '28850'
  Maintainer: Debian Electronics Team <pkg-electronics-devel@lists.alioth.debian.org>
  Package: verilator
  Priority: optional
  Recommends: libsystemc-dev
  Section: electronics
  Suggests: gtkwave
  Version: 5.006-3
srcpkg_name: verilator
srcpkg_version: 5.006-3

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verilator_5.006-3_amd64.deb
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Relation Direction Type Name
built-using Source package verilator_5.006-3

binary package System - - 5 months, 3 weeks ago 4 months, 3 weeks
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